A circuit arrangement for regulating the duty cycle of an electrical signal including a first input differential amplifier, to which an input signal is applied; a first current source for controlling the current through the first input differential amplifier; a second input differential amplifier, to which the same input signal is applied; a second current source for controlling the current through the second input differential amplifier; a device which generates a fluctuating voltage signal from output signals of the two input differential amplifiers; a buffer device, which converts the fluctuating voltage signal into a digital output signal; a capacitance and a device for charging and discharging the capacitance in time with the digital output signal. The voltage present at the capacitance is fed to the first and second current sources as control voltage and effects regulation of the two current sources in opposite senses.