The present application describes a frequency compensation scheme for a linear voltage regulator circuit, or its special case, a low-drop out voltage regulator (LDO). According to one embodiment, the frequency compensation scheme includes two circuits, an inner loop compensation circuit (240), and a circuit (245) at the output in parallel with one of the resistors of the output voltage divider (235). These two compensation elements (240, 245) are not interdependent and may be adjusted separately to provide more optimal frequency compensation. Advantages include smaller compensation circuit elements, die or board area savings, better phase margin over process technology variations and operating conditions, and ease of design adjustment.