A main word line driver to which negative voltage is supplied in a semiconductor memory device is provided. The main word line driver circuit of a semiconductor memory device, the circuit which generates main word line signals enabling a plurality of main word lines, respectively, comprises a voltage supply unit which supplies a first voltage to a node and then supplies a second voltage higher than the first voltage; and a plurality of output units which receive the first voltage and second voltage supplied to the node and generate the respective main word line signals. In the circuit, the first voltage is a negative voltage and the second voltage is the ground voltage. Since the main word line driver circuit receives a negative voltage lower than a ground voltage and the ground voltage, the transition speed from a low level to a high level of a main word line signal does not decrease even during a low voltage operation of the main word line driver circuit.