A system and method for reducing the amount of time for a boot operation is provided that includes a test management module that divides the memory into multiple test blocks and then selects a limited number of test blocks to test during a boot operation, thereby decreasing the overall amount of memory test time.

 
Web www.patentalert.com

< Devices for storing and accumulating defect information, semiconductor device and device for testing the same

< Hierarchical general interconnect architecture for high density FPGA'S

> Method of vector generation for estimating performance of integrated circuit designs

> Method and apparatus for determining whether an element in an integrated circuit is a feedback element
~ 00239