A semiconductor process tool having a dual angled loadlock system, wherein a substrate path through each of the loadlock chambers is angled and biased toward one side through a gate valve. A wafer handling chamber is in selective communication with the loadlock chambers. The wafer handling chamber has a robot that is capable of accessing substrates in both of the loadlock chambers. A gate valve includes an insert within a wall separating the wafer handling chamber from one of the loadlocks, and a valve seat mounted on the insert and protruding into the wafer handling chamber.