A circuit and a method are given, to realize a dynamical biasing of memory sense amplifiers for Sense Electronics Endowed (SEE) memory devices. Fast memories uses sense amplifiers in the read path in order to react fast with the data being delivered from a given address position. In order to achieve short response times, these sense amplifiers are normally supplied with a high bias current. Dynamically reducing the bias current after a certain "on" time of operation will save power for fast memories used in conditions where the utmost speed is not needed. Said circuit and method are designed in order to be implemented with a very economic number of components, capable to be realized with modern integrated circuit technologies.