A multi-chip electronic package which utilizes an organic, laminate chip carrier and a plurality of semiconductor chips positioned on an upper surface of the carrier. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities.