In a dual apparatus and a method thereof using a concurrent write function, a PCI bridge of an active board snoops a processor bus. When a processor carries data and a control signal to the processor bus in order to change content of a memory of the active board, the PCI bridge checks whether data synchronization is required. When the data synchronization is required, the PCI bridge buffers the data and the control signal from the processor bus, and transmits them to a standby board through a PCI bus. Accordingly, the content of the memory of the standby board is changed. While the PCI bridge performs the content change of the memory of the standby board, the processor of the active board changes content of the memory of the active board. Accordingly, a performance of the processor can be improved, and accordingly data synchronization can be performed quickly.


< Flash memory apparatus and method for merging stored data items

< Memory system with channel multiplexing of multiple memory devices

> Method and apparatus for increasing an amount of memory on demand when monitoring remote mirroring performance

> Byte alignment circuitry

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