A semiconductor memory device is characterized by including a bit line, a transistor coupled to the bit line, a ferroelectric memory cell coupled to the bit line via the transistor, a shift circuit coupled to the bit line to lower a data potential that appears on the bit line in response to data stored in the memory cell, and a sense amplifier coupled to the bit line and to a ground potential to amplify a potential difference between the data potential lowered by the shift circuit and the ground potential.