A ferroelectric memory device includes a first trench formed in a semiconductor substrate and having a first depth, a second trench formed in the substrate and having a second depth, a first element isolation insulating film buried in the first trench, a first gate electrode formed in a lower region of the second trench, a first insulating film formed in an upper region of the second trench, first and second diffusion layers formed in the substrate on both side surface in the second trench, a first ferroelectric capacitor disposed on the first diffusion layer, a first contact disposed on the first ferroelectric capacitor, a first wiring layer disposed on the first contact, a second contact disposed on the second diffusion layer, and a second wiring layer disposed on the second contact and disposed in the same level as that of the first wiring layer.