A semiconductor memory comprises a memory cell, a pair of reference cells for use in generation of a reference electric potential, a first read circuit which compares a read electric potential obtained from the memory cell with the reference electric potential and determines data in the memory cell, a second read circuit which detects a state of the pair of reference cells and outputs a detection signal indicating the state of the pair of reference cells, and a control circuit which controls a write operation for the pair of reference cells based on the detection signal.