A capacitor structure in an integrated circuit includes a capacitor region defined within the boundaries thereof with an active circuit layer formed on the surface of the semiconductor substrate. A planarization layer is disposed over the active circuit layer and electrically isolated therefrom in at least the capacitor region. A metal capacitor layer is formed over the planarization layer within the capacitor region and having the bottom plates of a plurality of capacitors defined therein. A layer of dielectric is formed on the bottom plates of the plurality of capacitors of a predetermined thickness. A top plate is formed on the dielectric for each of the plurality of capacitors to define each of the plurality of capacitors, such that a portion of each of the bottom plates extends outside of the boundaries of the associated top plate.