A CD-ROM decoder for processing digital data while buffering the digital data in a buffer RAM. The CD-ROM decoder includes a host interface for storing the digital data in the buffer RAM. An EDC processing circuit generates an error detection code using the digital data read from the buffer RAM in a block unit. An ECC processing circuit generates an error correction code with the digital data and the error detection code. An internal RAM stores the digital data and adds the error detection code and the error correction code to the digital data when storing the digital data. A digital signal processor outputs the digital data, the error detection code, and the error correction code that are stored in the internal RAM in a block unit.

 
Web www.patentalert.com

< Smartcard test system and related methods

< X-tree test method and apparatus in a multiplexed digital system

> Device and method to carry out a viterbi-algorithm

> Computer implemented design system, a computer implemented design method, a reticle set, and an integrated circuit

~ 00298