A TFT is formed on a substrate. TFT has first and second regions as a source and a drain, a channel region between the first and second regions, and a gate electrode. An interlayer insulating film is formed on the substrate, covering the thin film transistor. A pixel electrode disposed on the interlayer insulating film is electrically connected to the first region of TFT via a via hole formed in the interlayer insulating film. A cover film covers the edge of the pixel electrode, exposes the inner area of the pixel electrode, and covers the surface of the interlayer insulating film in the area superposed upon the channel region of the thin film transistor to shield an ultraviolet ray. An organic light emission layer and an upper electrode are disposed on and above the pixel electrode.