A gate line GL is set to an H level to switch on a selection TFT (10) and a short-circuiting TFT (16). A current corresponding to data (data current (negative)) is applied to a data line (Data). In this manner, a current corresponding to the data current flows through a voltage converter TFT (12) and a driver TFT (14) and light is emitted from an organic EL element (50). A gate voltage of the voltage converter TFT (12) and the driver TFT (14) in this process is stored in a storage capacitor (C). Even after the data current is switched off and the selection TFT (10) and the short-circuiting TFT (16) are switched off, the driver TFT (14) continues to apply a current. After a predetermined emission period elapses, an erase line (ESL) is driven to switch an erase TFT (18) on to discharge the storage capacitor (C) and switch the driver TFT (14) off.

 
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> Memory device including barrier layer for improved switching speed and data retention

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