The present invention employs a mixture of digital signal processing and analog circuitry to reduce spurious noise in continuous time delta sigma analog-to-digital converters (CT.DELTA..SIGMA.ADCs). Specifically, a small amount of random additive noise, also referred to as dither, is introduced into the CT.DELTA..SIGMA.ADC to improve linear behavior by randomizing and de-correlating the quantization noise from the input signal without significantly degrading the SNR performance. In each of the embodiments, digital circuitry is used to generate the desired randomness, de-correlation, and spectral shape of the dither and simple analog circuit blocks are used to appropriately scale and inject the dither into the CT.DELTA..SIGMA.ADC loop. In one embodiment of the invention, random noise is added to the quantizer input. In another embodiment, a relatively small amount of current is randomly added or subtracted in the feedback loop to randomize and de-correlate the quantization noise from the input signal while maintaining required signal to noise ratios.

 
Web www.patentalert.com

> Semiconductor integrated circuit with A/D converter having a ladder-type resistor

~ 00324