Semiconductor memory devices include a memory cell array region having a plurality of memory cells, a local data I/O line pair that is electrically connected to the plurality of memory cells, a local sense amplifier that is electrically connected to the local data I/O line pair, a read global data I/O line pair that is electrically connected to the local sense amplifier and that is configured to transmit data during a read operation and a write global data I/O line pair that is electrically connected to the local sense amplifier that is configured to transmit data during a write operation.