A circuit for computing the inner of scalar product of two vectors in a
finite Galois field defined by a generator polynomial, wherein each
vector includes at least two elements belonging to said finite field,
comprises one or more look-up tables storing digital words indicative of
said possible combinations and said possible reductions. The digital
words in question are defined as a function of the second elements of
said vectors and the generator polynomial of the field. The input
register(s) and the look-up table(s) are configured to co-operate in a
plurality of subsequent steps to generate at each step a partial product
result identified by at least one of digital word addressed in a
corresponding look-up table as a function of the digital signals stored
in the input register(s). The circuit also includes an accumulator unit
for adding up the partial results generated at each step to give a final
product result deriving from accumulation of said partial results.