A timing analysis apparatus reads a net list including connection
information and the like of circuit cells of an LSI, delay data for
previously storing delay information of the circuit cells, stage
count-derating factor dependency and components P, V and T of a derating
factor; detects the number of stages of each signal path by a signal path
cell counting section; determines a derating factor corresponding to the
extent of averaging of random variation of each signal path in accordance
with the number of stages of the signal path; and performs timing
analysis on the basis of the determined derating factor. Therefore, more
realistic and highly accurate timing design can be performed on a
large-scale circuit.