A three state class D amplifier (100) comprising a first signal path (1) and a second signal path (1') substantially identical with the first signal path (1). Each of the signal paths (1, 1') comprises respective first and second low-pass filter means (10, 10') coupled to respective input signals (Vn, Vp) provided by input means (Inp, In, Ip), first and second ends (A, B) of a load (5) and to an pulse generator (2) providing a signal having a frequency substantially higher than a frequency of the input signals (Vn, Vp) for generating respective first and second low-pass filtered signals (SUP, SDW). The low-pass filtered signals (SUP, SDW) are inputted to respective comparing means (3, 3'). The comparing means (3, 3') are coupled to a threshold generator (4) coupled to the input means (Inp, In, Ip) and to first and second reference signals (Vmax, Vmin) representing an estimation of a maximum and a minimum signal value through the load (5) and generating an alternating threshold signal (THRES) that is inverse proportional to a difference between the first and second input signals (Vn, Vp) for maintaining a relative high gain of the amplifier in an idle state.