A PFM-type voltage regulator circuit converts an unregulated input voltage into a regulated output voltage using a first transistor controlled by a pulse control circuit and a second transistor controlled by a linear regulator circuit. The linear regulator circuit controls the second transistor when the regulated output voltage falls to a predetermined minimum target voltage level, thereby maintaining the regulated output voltage at the minimum target voltage level. The pulse control circuit detects the current passing through the second transistor, and in response generates a pulse signal having a predetermined duration that fully turns on the first transistor. The voltage through the first transistor is converted to an increasing inductor current that refreshes the regulated output voltage to a maximum target voltage level. When the pulse signal ends, the regulated output voltage again begins to fall toward the predetermined minimum target voltage level, and the cycle is repeated.

 
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> Current limiting using PWM control

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