A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage sources, whereby the current-voltage characteristic of the input pad becomes stabilized during an open/short checkup of a semiconductor device. The semiconductor device includes a semiconductor substrate having a plurality of device isolation regions, first and second n-wells horizontally spaced from either of the plurality of device isolation regions, a p-channel transistor formed in the second n-well, an input protection transistor horizontally spaced from the first n-well and the device isolation region, on a symmetrical portion by the first n-well to the second n-well, and a guard ring formed between the first n-well and the input protection transistor.

 
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> MEMS device trench plating process and apparatus for through hole vias

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