There is disclosed a wiring board comprising a core substrate 110, a build-up layer 130a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.