This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of a wafer. A wafer level test system uses optical and electronic probes to search for and align with an optoelectronic alignment structure. The test system uses a located optoelectronic alignment structure as a reference point to locate other devices on the wafer. The system tests the operation of selected devices disposed on the wafer. The optoelectronic alignment loop is also used as an alignment reference of known performance for an adjacent device of unknown performance.