A nonvolatile semiconductor memory device including a source region and a drain region formed on a surface of a semiconductor substrate, a channel-forming region formed so as to connect the source region and the drain region or so as to be sandwiched between the source region and the drain region, a tunnel insulating film formed in contact with the channel-forming region, a charge retention layer formed adjacently to the tunnel insulating film, a gate insulating film formed adjacently to the charge retention layer, and a control gate formed adjacently to the gate insulating film. The charge retention layer includes an insulating matrix having, per nonvolatile semiconductor memory device, one conductive nano-particle which is made of at least one single-element substance or chemical compound that functions as a floating gate.