A multilayer PCB including at least one carrier, wherein the at least one carrier comprises a pseudo three-layer core. Each three-layer core includes a first metal layer, a first dielectric layer, an internal bridge layer, a second dielectric layer, and a second metal layer. The bridge layer includes a plurality of bridge pads. Each carrier includes a plurality of interlayer interconnection units for interconnecting the first and second metal layers. Each interlayer interconnection unit comprises a pair of opposed blind vias and a bridge pad disposed between, and in electrical contact with, the pair of blind vias.