A method of manufacturing a transistor. In one embodiment, the method includes forming a gate electrode by defining a gate groove in the substrate. A plate-like portion is defined in each of the trenches at a position adjacent to the groove so that the two plate-like portions will be connected with the groove and the groove is disposed between two plate-like portions. In one embodiment, the two plate-like portions are defined by an etching process which selectively etches the isolating material of the isolation trenches with respect to the semiconductor substrate material. A gate insulating material is provided at an interface between the active area and the groove and the interface between the active area and the plate-like portions, and a gate electrode material is deposited so as to fill the groove and the two plate-like portions.