A semiconductor memory device and a refresh clock signal generator thereof are provided. The refresh clock signal generator of the semiconductor memory device includes a voltage generator for receiving a power voltage to generate a voltage which is lower than the power voltage; a ring oscillator enabled in response to a self refresh control signal, including an odd number of at least three inverters, having a first current consumption when a temperature of the semiconductor memory device is high and a second current consumption when the temperature is low, and generating a clock signal whose cycle is increased as the temperature is lowered; and a level shifter for converting the clock signal of the voltage which is lower than the power voltage into a refresh clock signal which has a level of the power voltage.