A method and apparatus for enforcing design for manufacturability rules on a circuit layout is provided. A tool receives a first set of design rules, to be applied to the circuit layout, which must be followed. The tool also receives a second set of design rules, to be to the circuit layout, which may be followed. The first set of design rules may be supplied by an employer or followed by a design team, and the second set of design rules may correspond to a set of design for manufacturability (DFM) rules. The tool applies the first set of design rules and the second set of design rules to the circuit layout to generate a revised circuit layout. The revised circuit layout conforms to each of the first set of design rules, and conforms to as many design rules in the second set of design rules as possible.