An overvoltage protection circuit for protecting low voltage, high speed digital communication lines. The circuit is integrated into a semiconductor chip and includes a diode bridge, a transient voltage suppressor (TVS) device and resistors through which a bias voltage can be applied to the TVS device to reduce the capacitance hereof.

 
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< Magnetic recording head having a switching layer which may be rendered non-magnetic by heating

> Power and ground ring snake pattern to prevent delamination between the gold plated ring and mold resin for wirebond PBGA

~ 00496