Wordline stacks are arranged parallel at a distance from one another on a
substrate surface. Bitlines are arranged transversely to the wordline
stacks at a distance from one another. Source/drain regions are formed as
doped regions in the vicinity of the wordline stacks. A resistive layer
is disposed between a plurality of the source/drain regions and the
bitlines and formed of a material having a resistance that is switched by
an applied voltage. Source lines are arranged parallel to the wordline
stacks so that they connect further pluralities of the source/drain
regions.