A computer-implemented method of performing a Computer-Aided Design (CAD) flow on a circuit design for a programmable logic device (PLD) can include inserting a preprocessing task into the CAD flow prior to a selected task that does not recognize a constraint, wherein the preprocessing task introduces a modification into the circuit design according to the constraint. The circuit design including the modification can be processed through the selected task of the CAD flow. A reversal task can also be inserted into the CAD flow, wherein the reversal task removes the modification introduced into the circuit design by the preprocessing task. The method further can include processing the circuit design through at least one other task of the CAD flow and outputting the processed circuit design.