A device includes a plane metallization layer, and a plane plated through hole attached to the plane metallization layer and terminating at the at a major exterior surface with a plurality of component mounting pads. The plated through hole is attached to the plane metallization layer. The plane plated through hole is electrically isolated from the plurality of component mounting pads at the exterior surface. A method for testing the device includes contacting the signal carrying through hole, and contacting the plane through hole, and checking for current flow between the signal carrying through hole and the plane through hole. If current flows between the signal carrying through hole and the plane through hole the device fails. If no current flows between the signal carrying through hole and the plane through hole the device passes.

 
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< Processor apparatus

> Information recording medium, method and apparatus for recording and reproducing information

> Semiconductor device manufacturing method and manufacturing apparatus

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