A pull down circuit pulls a bit line voltage to a regulated source voltage
in a non-volatile storage device during a sense operation such as a
verify operation which occurs during programming. The storage device may
include NAND strings which have associated bit lines and sense
components, and a common source line. When a selected storage element of
a NAND string has been programmed to its intended state, the bit line is
locked out during subsequent verify operations which occur for other NAND
strings which are not yet locked out. The pull down device is coupled to
each bit line and to the common source line, whose voltage is regulated
at a positive DC level, to prevent coupling of system power bus
(V.sub.SS) noise from the locked out bit lines to the not yet locked out
bit lines.