A semiconductor memory device is provided, which comprises an analog switch, a first inverter, a second inverter, and a clocked inverter. A first terminal of the analog switch is electrically connected to a first data line. A second terminal of the analog switch is electrically connected to an input terminal of the first inverter, an output terminal of the second inverter, and an input terminal of the clocked inverter. An output terminal of the first inverter is electrically connected to an input terminal of the second inverter. An output terminal of the clocked inverter is electrically connected to a second data line. Each of the analog switch and the clocked inverter is electrically connected to at least one word line. The word line electrically connected to the analog switch is different from the word line electrically connected to the clocked inverter.