In a replica circuit, a potential simulating a waveform of current passing through an inductor is generated as a referential potential. A timing when the referential potential and an output potential become substantially the same as each other and a timing when the current passing through the inductor becomes substantially zero are set to substantially correspond to each other. A control circuit turns off an NMOS transistor at a time when the current passing through the inductor becomes lower than 0 [A]. At this time, a PMOS transistor is already turned off. Therefore, the current passing through the inductor can be reliably prevented from flowing in reverse to the switch element.