There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stacking which are provided around or in the connection region on the substrate, wherein a reinforcing member as a reinforcing region for reinforcing a portion between the plurality of alignment marks is provided on the substrate.

 
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< Semiconductor device and semiconductor chip

> Method of testing circuit elements on a semiconductor wafer

> Multi-segment parallel wire capacitor

~ 00570