A semiconductor package includes a chip including a conductive pattern thereon, a conductive network attached on a surface of the chip to absorb static electricity, at least one conductive rod attached to the conductive network, wherein the at least one conductive rod is formed substantially perpendicularly to the conductive network, and a grounding portion discharging the static electricity absorbed from the conductive network.

 
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< Device having an array of embedded capacitors for power delivery and decoupling of high speed input/output circuitry of an integrated circuit

> Semiconductor device with lead frame including conductor plates arranged three-dimensionally

> Semiconductor device and method of manufacturing the same

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