An interconnect structure and method of fabricating the same in which the critical dimension of the conductive features are not altered by a plasma damaged layer are provided. In accordance with the present invention, a chemically etching dielectric material is subjected to a treatment step which modifies the density of the dielectric material such that the treated surfaces become denser than the bulk dielectric not subjected to the treatment. The treatment step is performed prior to deposition of the noble metal liner.

 
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< Metal and alloy silicides on a single silicon wafer

> System with multi-location arc threshold comparators and communication channels for carrying arc detection flags and threshold updating

> Method of wafer level transient sensing, threshold comparison and arc flag generation/deactivation

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