Memory cells of a storage device are addressed in n-bit word(s). Each of the n-bit word memory cells are partitioned into k (k.gtoreq.2) groups of n/k bits. The memory cells are sequentially selected in n/k bits. Data of the selected n/k bit memory cells are read by n/k sense amplifiers and serially output from the storage device as readout data. The storage device requires much less chip area for n/k sense amplifiers and reduced peak currents in a read operation.