A non-volatile memory system is formed of floating gate memory cells
arranged in blocks as the smallest unit of memory cells that are erasable
together. The system includes a number of features that may be implemented
individually or in various cooperative combinations. One feature is the
storage in separate blocks of the characteristics of a large number of
blocks of cells in which user data is stored. These characteristics for
user data blocks being accessed may, during operation of the memory system
by its controller, be stored in a random access memory for ease of access
and updating. According to another feature, multiple sectors of user data
are stored at one time by alternately streaming chunks of data from the
sectors to multiple memory blocks. Bytes of data in the stream may be
shifted to avoid defective locations in the memory such as bad columns.
Error correction codes may also be generated from the streaming data with
a single generation circuit for the multiple sectors of data. The stream
of data may further be transformed in order to tend to even out the wear
among the blocks of memory. Yet another feature, for memory systems having
multiple memory integrated circuit chips, provides a single system record
that includes the capacity of each of the chips and assigned contiguous
logical address ranges of user data blocks within the chips which the
memory controller accesses when addressing a block, making it easier to
manufacture a memory system with memory chips having different capacities.
A typical form of the memory system is as a card that is removably
connectable with a host system but may alternatively be implemented in a
memory embedded in a host system. The memory cells may be operated with
multiple states in order to store more than one bit of data per cell.
