Wafer pattern variation of integrated circuit fabrication

   
   

A method for manufacturing an integrated circuit on a semiconductor wafer is provided. The semiconductor wafer has complete die and partial die areas thereon. Functional circuit patterns are formed in a plurality of the complete die areas. The thermal absorption properties of the semiconductor wafer are tuned by forming differing patterns in a plurality of the partial die areas.

Un método para fabricar un circuito integrado en una oblea de semiconductor se proporciona. La oblea de semiconductor tiene el dado completo y áreas parciales del dado sobre eso. Los patrones funcionales del circuito se forman en una pluralidad de las áreas completas del dado. Las características de la absorción termal de la oblea de semiconductor son templadas formando patrones que diferencian en una pluralidad de las áreas parciales del dado.

 
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> Semiconductor package and package stack made thereof

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