A method and system sense the logic state of an unknown initial data bit
stored in a selected resistive memory cell. According to one method, a
first count representing the logic state of the unknown initial data bit
stored in the selected memory cell is generated. A second count is then
generated, and represents a data bit having a first known logic state
stored in the selected memory cell. A third count is then generated, and
represents a data bit having a second known logic state stored in the
selected memory cell. The logic state of the initial unknown data bit
stored in the selected memory cell is then determined from the first,
second, and third counts.
