A chip package having at least a substrate, a chip and a conductive trace
is provided. The substrate has a first surface, a second surface, a cavity
and at least one substrate contact all positioned on the first surface of
the substrate. The chip has an active surface with at least one chip
contact thereon. The chip is accommodated inside the cavity with at least
one sidewall having contact with one of the sidewalls of the cavity. The
active surface of the chip and the first surface of the substrate are
coplanar. The conductive trace runs from the active surface of the chip to
the first surface of the substrate so that the chip contact and the
substrate contact are electrically connected.
