A method of verifying test data for testing an integrated circuit device
having multiple device time domains includes selecting a virtual tester
time domain and, if the cycle duration of the virtual tester time domain
is equal to the cycle duration of one of the multiple device time domains,
translating the test data for each device time domain other than that one
time domain to the virtual tester time domain and otherwise translating
the test data for each device time domain to the virtual tester time
domain. The translated test data is then applied to a device logic
simulator that simulates integrated circuit device.
