An isolation trench in a semiconductor includes a first isolation trench portion
having a first depth and having a first sidewall intersecting a surface of the
semiconductor at a first angle. A second isolation trench portion extends within
and below the first isolation trench portion. The second isolation trench portion
has a second depth and includes a second sidewall. The second sidewall intersects
the first sidewall at an angle with respect to the surface that is greater than
the first angle. A dielectric material fills the first and second isolation trench portions.