An electronic component includes an organic interposer (160, 460, 560, 660,
760, 860, 960), a semiconductor chip (220) mounted over the organic
interposer, copper pads (250, 751, 851) under the organic interposer, a
solder attachment (110, 510, 610, 910) between certain ones of the copper
pads, and solder interconnects (120, 420) between certain other ones of
the copper pads and located around an outer perimeter (111, 511, 911) of
the solder attachment. The solder attachment is placed at locations within the
electronic component that experience the greatest stress, which may include, for
example, locations adjacent to at least a portion of a perimeter (221) of
the semiconductor chip. In one embodiment, a surface area of the solder attachment
is larger than a surface area of each one of the solder interconnects. In the same
or another embodiment, the electronic component includes multiple solder attachments.
