MISFET which constitutes a semiconductor integrated circuit improved in integration

   
   

There is disclosed a semiconductor device which comprises a semiconductor substrate, a pair of element isolating insulating films separately formed in the semiconductor substrate and defining an element region, a pair of impurity diffusion regions formed in the element regions and in contact with the element isolating insulating films, respectively, a channel region interposed between the pair of impurity diffusion regions, and a gate electrode formed via a gate insulating film on the channel region, the gate electrode being disposed away from end portions of the impurity diffusion regions. The gate length of the gate electrode is limited to 30 nm or less, the distance between the impurity diffusion regions and the edges of the gate electrode is respectively limited to 10 nm or less, and the distribution in lateral direction of impurity concentration in the impurity diffusion regions is limited to 1 digit/3 nm or more.

 
Web www.patentalert.com

< MOS transistor

< Structure of a CMOS image sensor

> Ferroelectric memory device including an upper protection electrode

> Single transistor ferroelectric transistor structure with high-k insulator

~ 00190