A semiconductor device with high structural reliability and low parasitic capacitance is provided. In one example, the semiconductor device has a surface. The semiconductor device comprises a semiconductor region, wherein an emitter region, a base region, and a collector region are laminated from a side near a substrate of the semiconductor region; an insulating protection layer disposed on the surface; and a wiring layer disposed on the surface, the insulating protection layer forming a via hole from the side of the substrate of the semiconductor region, the via hole being formed to allow the wiring layer to make a contact to an electrode of the emitter region from a side of the substrate where the emitter region, the base region, and the collector region are laminated and where the semiconductor region is isolated.

 
Web www.patentalert.com

< Flip chip optical semiconductor on a PCB

< High performance diode implanted voltage controlled p-type diffusion resistor

> Method of forming a stacked device filler

> Semiconductor device with improved reliability and manufacturing method of the same

~ 00230