An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably comprising two diode portions and an antifuse, then filling and planarizing; and continuing to form conductors and semiconductor elements in multiple stories of memories. The arrangement of processing steps and the choice of materials decreases aspect ratio of each memory cell, improving the reliability of gap fill and preventing etch undercut.

 
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< Integrated semiconductor storage with at least a storage cell and procedure

< Semiconductor constructions having crystalline dielectric layers

> Apparatus and circuit having reduced leakage current and method therefor

> Semiconductor device with fully silicided source/drain and damascence metal gate

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